The invention relates to a method of manufacturing a semiconductor device comprising a semiconductor body of silicon which is provided at a surface with a field effect transistor with an isolated gate electrode, which surface is covered with a gate-dielectric layer on which a silicon layer is deposited, whereon an etch mask is formed which defines the gate electrode, whereafter the gate electrode is formed from the silicon layer by means of etching, after which doped regions are provided next to the gate electrode by implanting ions at the surface of the semiconductor body, which regions form a source region and a drain region of the transistor, whereafter, in a next step, a metal layer is applied which forms a contact with the source and drain regions in the semiconductor body and with an upper surface of the gate electrode and which is separated from the side walls of the gate electrode by an intermediate electrically insulating layer covering the side walls of the gate electrode, whereafter, by means of heating, metal silicide contacts are formed at locations where the metal layer contacts silicon and, subsequently, non-converted parts of the metal layer are removed by selective etching.
Such a method is disclosed, inter alia, in the patent document U.S. Pat. No. 5,753,557. In the manufacture of integrated circuits, the source and drain regions formed, as well as the gate electrode, are customarily provided with low-impedance contacts of a metal-silicon alloy, hereinafter referred to as silicide. The provision of these silicide contacts customarily takes place in a self-aligning manner by depositing a suitable metal, such as Ti, throughout the surface and subsequently carrying out a heating step. At the location where the Ti directly contacts the silicon, such as on the source and drain regions of the transistors and on the gate electrodes which are customarily made of doped polysilicon, the titanium is converted to silicide. At the location where titanium does not contact silicon, such as above field oxide or above groove-isolations, and on the spacer-covered side faces of the gate electrodes, the titanium is not converted. The unconverted titanium can be removed in a selective etching step. In practice it has been found that this often leads to a short-circuit between the source region and/or the drain region, on the one hand, and the gate electrode, on the other hand, via a connection along the spacers. In the literature, this phenomenon is often referred to as "bridging". To preclude this short-circuit, it has already been proposed in the above-mentioned patent document U.S. Pat. No. 5,753,557 to extend the spacers on the gate electrode as far as the upper surface of the gate electrode, so that the distance between the silicide contacts is increased. A drawback of this method is, inter alia, that the contact on the gate electrode is reduced in size and hence the input resistance of the transistor is increased. In addition, this method requires a rather critical etching step to obtain the mask defining the contact on the gate electrode.